wiki:Technical details
Last modified 5 years ago Last modified on 09/09/13 13:16:35

Some technical details

Structural view


  1. S/PDIF-to-rtp (software-like hardware )

1.1 Physical receiver (transformer & RS422 receiver)

1.2 S/PDIF-to-eth vhdl core in xilinx FPGA

1.3 Fast ethernet phy with MII interface

2.rtp-to-alsa (software part) (Now it is so shoddy, and can be used to demonstrate possibilities only)

  • We use kernel sockets
  • & slightly modified aloop driver from ALSA
  • alsa-to-spdif is the same, but in reverse direction.
  • rtp sender in ALSA is synchronized by incoming RTP stream (because there is no other suitable source inside ordinary PC)
  • Our soundcard transmit a multicast RTP stream, that is suitable for use more than one PC (for backup for example), and
  • we need to configure arp for playback only on the one PC

In the S/PDIF VHDL source-code we actually use AES3 terminology & bit usage (revision AES3-2003)


eth_to_spdif : guard timer if receive hang in the middle of packet

device config via UDP packet

ssdp announce

vcxo sync

status via udp packet